- Title: Design and FPGA implementation of functions for an interference-canceler receiver
Payer: INDRA SISTEMAS
Period: 2013-2014 - Title: Development of electronic technologies
Payer: TECNATOM
Period: 2010-2014 - Title: Development of a CMA Equalizer core
Payer: ERZIA TECHNOLOGIES, S.L.
Period: 2012 - Title: Synchronization algorithms for a DS-SS MODEM
Payer: INDRA ESPACIO
Period: 2010-2011 - Title: Detailed design and FPGA implementation of a high speed MODEM
Payer: INDRA ESPACIO
Period: 2007-2008 - Title: Detailed design and FPGA implementation of functions for a Spread Spectrum In Orbit Test MODEM
Payer: INDRA ESPACIO
Period: 2006-2007 - Title: Design and FPGA implementation of a receiver for DSRC (Dedicated Short-Range Communications)
Payer: INDRA ESPACIO
Period: 2006